From 1a21705e7314c856dd8f75a66c99913376f3fd0f Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Tue, 25 Jan 2022 00:01:04 +0100 Subject: [PATCH] arch/Config.in.x86: westmere and silvermont were added in gcc 4.9 These were added in gcc commit d3c11974032e21121a051d423a1d71097edf752f ("Use proper Intel processor names for -march=/-mtune=") which was merged in gcc 4.9. Signed-off-by: Thomas Petazzoni Signed-off-by: Yann E. MORIN --- arch/Config.in.x86 | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/Config.in.x86 b/arch/Config.in.x86 index 4beb11662d..0aae26799c 100644 --- a/arch/Config.in.x86 +++ b/arch/Config.in.x86 @@ -196,6 +196,7 @@ config BR2_x86_westmere select BR2_X86_CPU_HAS_SSSE3 select BR2_X86_CPU_HAS_SSE4 select BR2_X86_CPU_HAS_SSE42 + select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9 config BR2_x86_corei7_avx bool "corei7-avx" select BR2_X86_CPU_HAS_MMX @@ -273,6 +274,7 @@ config BR2_x86_silvermont select BR2_X86_CPU_HAS_SSSE3 select BR2_X86_CPU_HAS_SSE4 select BR2_X86_CPU_HAS_SSE42 + select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9 config BR2_x86_k6 bool "k6" depends on !BR2_x86_64