From 4df243b470d12f1db2e431aeabb49101048bf285 Mon Sep 17 00:00:00 2001 From: Romain Naour Date: Sun, 10 Aug 2025 22:36:21 +0200 Subject: [PATCH] package/gcc: add microblaze fix for GCC bug 121432 This is a temporary fix under discussion [1], but it resolves the problem, by implementing the same behavior as GCC 14.x for register allocation on Microblaze. Tested with qemu_microblazeel_mmu_defconfig and used to generate Microblaze toolchains for the Bootlin toolchains 2025.08-1 [2]. [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121432#c10 [2] https://github.com/bootlin/buildroot-toolchains/commit/83947c7bb6158072bc2f52b58e90891cd3dc04a2 Signed-off-by: Romain Naour Signed-off-by: Peter Korsgaard --- ...-config-microblaze-fix-ira-for-GCC15.patch | 56 +++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 package/gcc/15.1.0/0003-gcc-config-microblaze-fix-ira-for-GCC15.patch diff --git a/package/gcc/15.1.0/0003-gcc-config-microblaze-fix-ira-for-GCC15.patch b/package/gcc/15.1.0/0003-gcc-config-microblaze-fix-ira-for-GCC15.patch new file mode 100644 index 0000000000..6a1e5cf31a --- /dev/null +++ b/package/gcc/15.1.0/0003-gcc-config-microblaze-fix-ira-for-GCC15.patch @@ -0,0 +1,56 @@ +From b6163bbd898e2462455998d5d38fe1463e70ca66 Mon Sep 17 00:00:00 2001 +From: Romain Naour +Date: Wed, 6 Aug 2025 22:32:30 +0200 +Subject: [PATCH] gcc/config/microblaze: fix ira for GCC15 + +Add new hooks for callee-save on microblaze defined by [1] and +return 1 to restore the old behavior prior to the commit [3]. + +Tested with qemu_microblazeel_mmu_defconfig and used to generate +Microblaze toolchains for the Bootlin toolchains 2025.08-1 [4][5]. + +Upstream: suggested in the bug report: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121432#c10 + +[1] https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=b191e8bdecf881d11c1544c441e38f4c18392a15 +[2] https://gcc.gnu.org/git/?p=gcc.git;a=blob;f=gcc/config/i386/i386.cc;h=3128973ba79cccfc6761f451dcb716b9558cc4da;hb=d3ff498c478acefce35de04402f99171b4f64a1a#l20606 +[3] https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=3b9b8d6cfdf59337f4b7ce10ce92a98044b2657b +[4] https://lore.kernel.org/buildroot/87sehzndtp.fsf@dell.be.48ers.dk/T/#mce7decd0b3f6a41008d5de577538a8525c91b374 +[5] https://toolchains.bootlin.com/ + +Signed-off-by: Romain Naour +--- + gcc/config/microblaze/microblaze.cc | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc +index 4b7f0a1a5e0..3710755ae8d 100644 +--- a/gcc/config/microblaze/microblaze.cc ++++ b/gcc/config/microblaze/microblaze.cc +@@ -3200,6 +3200,14 @@ microblaze_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED, + return NO_REGS; + } + ++/* Implement TARGET_CALLEE_SAVE_COST. */ ++static int ++microblaze_callee_save_cost (spill_cost_type, unsigned int hard_regno, machine_mode, ++ unsigned int, int mem_cost, const HARD_REG_SET &, bool) ++{ ++ return 1; ++} ++ + static void + microblaze_globalize_label (FILE * stream, const char *name) + { +@@ -4038,6 +4046,9 @@ microblaze_starting_frame_offset (void) + #undef TARGET_SECONDARY_RELOAD + #define TARGET_SECONDARY_RELOAD microblaze_secondary_reload + ++#undef TARGET_CALLEE_SAVE_COST ++#define TARGET_CALLEE_SAVE_COST microblaze_callee_save_cost ++ + #undef TARGET_ASM_OUTPUT_MI_THUNK + #define TARGET_ASM_OUTPUT_MI_THUNK microblaze_asm_output_mi_thunk + +-- +2.50.1 +