From 9845bd4541cb03e97e577281f3c64f00c6ead881 Mon Sep 17 00:00:00 2001 From: Julien Olivain Date: Sun, 24 Nov 2024 22:30:30 +0100 Subject: [PATCH] arch/arm: add Armv9-A and the Neoverse N2 core This commit adds the Neoverse N2 core, which is an implementation of the armv9.0a ISA. See: [1] [2]. This CPU support was added in GCC 11. See [3]. The Neoverse N2 CPU is included in the Arm sbsa-ref platform in Qemu. The Armv9.0-A Buildroot support will be needed to update those SBSA related components. See the note in commit log [4]. This commit introduces the BR2_ARM_CPU_ARMV9A Kconfig symbol, which just selects BR2_ARM_CPU_ARMV8A. This is because Armv9.0-A is a superset of Armv8.5-A. This symbol can help package recipes to detect this new base architecture. Neoverse-N2 support has been added in QEmu in commit [5], first included in v8.2.0. This CPU supports Aarch32 only in EL0 (user-space). This means it's technically possible to compile Aarch32 code targeting it. GCC has the support to do so. Since Buildroot recompiles a full system (ATF, Kernel, user-space) this support has limited value. This is why this CPU is limited to 64bit builds only. [1] https://developer.arm.com/Processors/Neoverse%20N2 [2] https://developer.arm.com/documentation/102099/0003/The-Neoverse-N2--core/Neoverse-N2--core-features [3] https://gcc.gnu.org/gcc-11/changes.html [4] https://gitlab.com/buildroot.org/buildroot/-/commit/c58a2a9687c045379c0f768c8c6c1c1a41842a85 [5] https://gitlab.com/qemu-project/qemu/-/commit/dfff1000fef24f6686e0be5e6472613985a363dc Signed-off-by: Julien Olivain Signed-off-by: Thomas Petazzoni --- arch/Config.in.arm | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/Config.in.arm b/arch/Config.in.arm index a11d581c43..68b4dfea26 100644 --- a/arch/Config.in.arm +++ b/arch/Config.in.arm @@ -95,6 +95,14 @@ config BR2_ARM_CPU_ARMV8A bool select BR2_USE_MMU +# Armv9.0-A base specification is a super-set of Armv8.5-A. It is +# fully compatible with Armv8. This symbol is defined to allow checks +# for doing Armv9 optimization. Armv8 is also selected for +# compatibility. +config BR2_ARM_CPU_ARMV9A + bool + select BR2_ARM_CPU_ARMV8A + choice prompt "Target Architecture Variant" default BR2_cortex_a53 if BR2_ARCH_IS_64 @@ -496,6 +504,14 @@ config BR2_saphira select BR2_ARM_CPU_HAS_FP_ARMV8 select BR2_ARM_CPU_ARMV8A select BR2_ARCH_NEEDS_GCC_AT_LEAST_8 + +comment "armv9.0a cores" +config BR2_neoverse_n2 + bool "neoverse-N2 (aka perseus)" + depends on BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV9A + select BR2_ARCH_NEEDS_GCC_AT_LEAST_11 endchoice config BR2_ARM_ENABLE_NEON @@ -889,6 +905,8 @@ config BR2_GCC_TARGET_CPU default "tsv110" if BR2_tsv110 # armv8.4a default "saphira" if BR2_saphira + # armv9.0a + default "neoverse-n2" if BR2_neoverse_n2 config BR2_GCC_TARGET_ABI default "aapcs-linux" if BR2_arm || BR2_armeb