diff --git a/Config.in.legacy b/Config.in.legacy
index 62717463df..34d8c71cc8 100644
--- a/Config.in.legacy
+++ b/Config.in.legacy
@@ -146,6 +146,19 @@ endif
 
 comment "Legacy options removed in 2022.02"
 
+config BR2_TARGET_UBOOT_ZYNQ_IMAGE
+	bool "Generate image for Xilinx Zynq"
+	select BR2_LEGACY
+	help
+	  Since 2016.1, U-Boot can natively generate the Zynq boot
+	  image, and so the Xilinx-specific format and tools have been
+	  removed. Should you still have an older U-Boot that needs
+	  this, a python3 version of the zynq-boot-bin.py script can be
+	  downloaded from the URL below and called from a post-build
+	  script.
+
+	  https://gist.githubusercontent.com/jameshilliard/e09235dfc6f96c11418a134e6ebf7890/raw/135b7480c405ae8a77a9db615e495f9a9f2d3242/zynq-boot-bin.py
+
 config BR2_PACKAGE_RPI_BT_FIRMWARE
 	bool "rpi-bt-firmware package was renamed"
 	depends on BR2_arm || BR2_aarch64
diff --git a/boot/uboot/Config.in b/boot/uboot/Config.in
index c630fc6552..1fd4dede92 100644
--- a/boot/uboot/Config.in
+++ b/boot/uboot/Config.in
@@ -455,18 +455,6 @@ config BR2_TARGET_UBOOT_SPL_NAME
 	  and TPL name is tpl/u-boot-tpl.bin but not always. SPL name is
 	  MLO on OMAP and SPL on i.MX6 for example.
 
-config BR2_TARGET_UBOOT_ZYNQ_IMAGE
-	bool "Generate image for Xilinx Zynq"
-	depends on BR2_arm
-	depends on BR2_TARGET_UBOOT_SPL
-	depends on BR2_TARGET_UBOOT_FORMAT_DTB_IMG
-	help
-	  Generate the BOOT.BIN file from U-Boot's SPL. The image
-	  boots the Xilinx Zynq chip without any FPGA bitstream.
-	  A bitstream can be loaded by the U-Boot. The SPL searchs
-	  for u-boot-dtb.img file so this U-Boot format is required
-	  to be set.
-
 config BR2_TARGET_UBOOT_ZYNQMP
 	bool "Boot on the Xilinx ZynqMP SoCs"
 	depends on BR2_aarch64
diff --git a/boot/uboot/uboot.mk b/boot/uboot/uboot.mk
index 574fc7089a..a61d1c8135 100644
--- a/boot/uboot/uboot.mk
+++ b/boot/uboot/uboot.mk
@@ -432,17 +432,6 @@ UBOOT_POST_BUILD_HOOKS += UBOOT_BUILD_OMAP_IFT
 UBOOT_POST_INSTALL_IMAGES_HOOKS += UBOOT_INSTALL_OMAP_IFT_IMAGE
 endif
 
-ifeq ($(BR2_TARGET_UBOOT_ZYNQ_IMAGE),y)
-define UBOOT_GENERATE_ZYNQ_IMAGE
-	$(HOST_DIR)/bin/python2 \
-		$(HOST_DIR)/bin/zynq-boot-bin.py \
-		-u $(@D)/$(firstword $(call qstrip,$(BR2_TARGET_UBOOT_SPL_NAME))) \
-		-o $(BINARIES_DIR)/BOOT.BIN
-endef
-UBOOT_DEPENDENCIES += host-zynq-boot-bin
-UBOOT_POST_INSTALL_IMAGES_HOOKS += UBOOT_GENERATE_ZYNQ_IMAGE
-endif
-
 ifeq ($(BR2_TARGET_UBOOT_ALTERA_SOCFPGA_IMAGE_CRC),y)
 ifeq ($(BR2_TARGET_UBOOT_SPL),y)
 UBOOT_CRC_ALTERA_SOCFPGA_INPUT_IMAGES = $(call qstrip,$(BR2_TARGET_UBOOT_SPL_NAME))
diff --git a/package/zynq-boot-bin/zynq-boot-bin.hash b/package/zynq-boot-bin/zynq-boot-bin.hash
deleted file mode 100644
index 0bc23de197..0000000000
--- a/package/zynq-boot-bin/zynq-boot-bin.hash
+++ /dev/null
@@ -1,2 +0,0 @@
-# From https://raw.githubusercontent.com/Xilinx/u-boot-xlnx
-sha1	940331ee02b0007099effa61e382fe7ea4174054	zynq-boot-bin.py
diff --git a/package/zynq-boot-bin/zynq-boot-bin.mk b/package/zynq-boot-bin/zynq-boot-bin.mk
deleted file mode 100644
index deba5f4096..0000000000
--- a/package/zynq-boot-bin/zynq-boot-bin.mk
+++ /dev/null
@@ -1,22 +0,0 @@
-################################################################################
-#
-# zynq-boot-bin
-#
-################################################################################
-
-ZYNQ_BOOT_BIN_VERSION = 2015.1
-ZYNQ_BOOT_BIN_SOURCE = zynq-boot-bin.py
-ZYNQ_BOOT_BIN_SITE = https://raw.githubusercontent.com/Xilinx/u-boot-xlnx/xilinx-v$(ZYNQ_BOOT_BIN_VERSION)/tools
-ZYNQ_BOOT_BIN_LICENSE = GPL-3.0+
-
-HOST_ZYNQ_BOOT_BIN_DEPENDENCIES = host-python
-
-define HOST_ZYNQ_BOOT_BIN_EXTRACT_CMDS
-	cp $(HOST_ZYNQ_BOOT_BIN_DL_DIR)/$(ZYNQ_BOOT_BIN_SOURCE) $(@D)
-endef
-
-define HOST_ZYNQ_BOOT_BIN_INSTALL_CMDS
-	$(INSTALL) -D -m 0755 $(@D)/$(ZYNQ_BOOT_BIN_SOURCE) $(HOST_DIR)/bin/$(ZYNQ_BOOT_BIN_SOURCE)
-endef
-
-$(eval $(host-generic-package))