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3529e8c21c
Add patch to fix linux bug: ``` HOSTLD scripts/dtc/dtc /usr/bin/ld: scripts/dtc/dtc-parser.tab.o:(.bss+0x10): multiple definition of `yylloc'; scripts/dtc/dtc-lexer.lex.o:(.bss+0x0): first defined here collect2: error: ld returned 1 exit status ``` Fixes: https://gitlab.com/buildroot.org/buildroot/-/jobs/2021478164 Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Intro
=====
Andestech(nds32) AE3XX Platform
The AE3XX prototype demonstrates the AE3XX example platform on the FPGA.
It is composed of one Andestech(nds32) processor and AE3XX.
How to build it
===============
Configure Buildroot
-------------------
The andes_ae3xx_defconfig configuration is a sample configuration with
all that is required to bring the FPGA Development Board:
$ make andes_ae3xx_defconfig
Build everything
----------------
Note: you will need to have access to the network, since Buildroot will
download the packages' sources.
$ make
Result of the build
-------------------
After building, you should obtain this tree:
output/images/
+-- vmlinux
+-- rootfs.cpio
+-- rootfs.tar
How to run it
=============
Run
---
Setup the Console with the rate 38400/8-N-1.
$ cd output/images
$ ../host/bin/nds32le-linux-gdb vmlinux
$ target remote [your host]
$ lo
$ c