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Merge remote-tracking branch 'origin/patch'

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This commit is contained in:
Ryan Kurtz
2025-04-11 09:27:40 -04:00
parent 1ef5566219 5746f9330b
commit 071652e3b9
3 changed files with 36 additions and 18 deletions
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2
Ghidra/Processors/MC6800/data/languages/6x09.sinc
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@@ -430,7 +430,7 @@ macro complement(op)
{ {
$(V) = 0; $(V) = 0;
$(C) = 1; $(C) = 1;
A = ~A; op = ~op;
setNZFlags(op); setNZFlags(op);
} }

15
Ghidra/Processors/MIPS/data/languages/mips16.sinc
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@@ -524,7 +524,8 @@ SAVE_TOP: SAVE_ARG^EXT_FRAME^SAVE_RA^SAVE_SREG^SAVE_STAT is EXT_FRAME & SAVE_RA
#double check gpr31 bit #double check gpr31 bit
} }
:jalr m16_rx is ISA_MODE=1 & RELP=1 & ext_isjal=0 & m16_op=0b11101 & m16_rr_nd=0 & m16_rr_l=1 & m16_rr_ra=0 & m16_rr_f=0b00000 & m16_rx [globalset(inst_next, ext_delay);] { :jalr m16_rx is ISA_MODE=1 & RELP=1 & ext_isjal=0 & m16_op=0b11101 & m16_rr_nd=0 & m16_rr_l=1 & m16_rr_ra=0 & m16_rr_f=0b00000 & m16_rx
[ ext_delay=0b01; globalset(inst_next, ext_delay); globalset(inst_start, ext_delay); ] {
JXWritePC(m16_rx); JXWritePC(m16_rx);
ra = inst_next | 0x1; ra = inst_next | 0x1;
delayslot( 1 ); delayslot( 1 );
@@ -537,21 +538,23 @@ SAVE_TOP: SAVE_ARG^EXT_FRAME^SAVE_RA^SAVE_SREG^SAVE_STAT is EXT_FRAME & SAVE_RA
call [pc]; call [pc];
} }
:jalx Abs26_m16 is ISA_MODE=1 & RELP=1 & ext_isjal=1 & ext_tgt_x=1 & Abs26_m16 [ ISA_MODE = 0; globalset(Abs26_m16, ISA_MODE); :jalx Abs26_m16 is ISA_MODE=1 & RELP=1 & ext_isjal=1 & ext_tgt_x=1 & Abs26_m16
globalset(inst_next, ext_delay); ] { [ ext_delay=0b10; ISA_MODE = 0; globalset(Abs26_m16, ISA_MODE); globalset(inst_next, ext_delay); globalset(inst_start, ext_delay); ] {
ra = inst_next | 0x1; ra = inst_next | 0x1;
delayslot( 1 ); delayslot( 1 );
ISAModeSwitch = 0; ISAModeSwitch = 0;
call Abs26_m16; call Abs26_m16;
} }
:jr ra is ISA_MODE=1 & RELP=1 & ext_isjal=0 & m16_op=0b11101 & m16_rr_nd=0 & m16_rr_l=0 & m16_rr_ra=1 & ra & m16_rr_f=0b00000 & m16_rx=0 [globalset(inst_next, ext_delay);] { :jr ra is ISA_MODE=1 & RELP=1 & ext_isjal=0 & m16_op=0b11101 & m16_rr_nd=0 & m16_rr_l=0 & m16_rr_ra=1 & ra & m16_rr_f=0b00000 & m16_rx=0
[ ext_delay=0b01; globalset(inst_next, ext_delay); globalset(inst_start, ext_delay); ] {
JXWritePC(ra); JXWritePC(ra);
delayslot( 1 ); delayslot( 1 );
return [pc]; return [pc];
} }
:jr m16_rx is ISA_MODE=1 & RELP=1 & ext_isjal=0 & m16_op=0b11101 & m16_rr_nd=0 & m16_rr_l=0 & m16_rr_ra=0 & m16_rr_f=0b00000 & m16_rx [globalset(inst_next, ext_delay);] { :jr m16_rx is ISA_MODE=1 & RELP=1 & ext_isjal=0 & m16_op=0b11101 & m16_rr_nd=0 & m16_rr_l=0 & m16_rr_ra=0 & m16_rr_f=0b00000 & m16_rx
[ ext_delay=0b01; globalset(inst_next, ext_delay); globalset(inst_start, ext_delay); ] {
JXWritePC(m16_rx); JXWritePC(m16_rx);
delayslot( 1 ); delayslot( 1 );
goto [pc]; goto [pc];
@@ -591,7 +594,7 @@ SAVE_TOP: SAVE_ARG^EXT_FRAME^SAVE_RA^SAVE_SREG^SAVE_STAT is EXT_FRAME & SAVE_RA
m16_ry = sext(*[ram]:4 OFF_M16); m16_ry = sext(*[ram]:4 OFF_M16);
} }
:lw m16_rx, OFF_M16PC is ISA_MODE=1 & RELP=1 & ext_isjal=0 & m16_op=0b10110 & m16_rx & OFF_M16PC & ext_delay { :lw m16_rx, OFF_M16PC is ISA_MODE=1 & RELP=1 & ext_isjal=0 & m16_op=0b10110 & m16_rx & OFF_M16PC {
m16_rx = sext(*[ram]:4 OFF_M16PC); m16_rx = sext(*[ram]:4 OFF_M16PC);
} }

37
Ghidra/Processors/x86/data/languages/ia.sinc
View File

@@ -3212,13 +3212,13 @@ define pcodeop cpuid_brand_part3_info;
enterFrames: low5 is low5 { tmp:1 = low5; export tmp; } enterFrames: low5 is low5 { tmp:1 = low5; export tmp; }
:ENTER imm16,enterFrames is $(LONGMODE_OFF) & vexMode=0 & addrsize=1 & byte=0xc8; imm16; enterFrames & low5=0x00 { :ENTER imm16,enterFrames is $(LONGMODE_OFF) & vexMode=0 & addrsize=1 & opsize=1 & byte=0xc8; imm16; enterFrames & low5=0x00 {
push44(EBP); push44(EBP);
EBP = ESP; EBP = ESP;
ESP = ESP - imm16; ESP = ESP - imm16;
} }
:ENTER imm16,enterFrames is $(LONGMODE_OFF) & vexMode=0 & addrsize=1 & byte=0xc8; imm16; enterFrames & low5=0x01 { :ENTER imm16,enterFrames is $(LONGMODE_OFF) & vexMode=0 & addrsize=1 & opsize=1 & byte=0xc8; imm16; enterFrames & low5=0x01 {
push44(EBP); push44(EBP);
frameTemp:4 = ESP; frameTemp:4 = ESP;
@@ -3255,9 +3255,24 @@ enterFrames: low5 is low5 { tmp:1 = low5; export tmp; }
ESP = ESP - imm16; ESP = ESP - imm16;
} }
:ENTER imm16,enterFrames is $(LONGMODE_OFF) & vexMode=0 & addrsize=1 & opsize=0 & byte=0xc8; imm16; enterFrames & low5=0x00 {
push42(BP);
BP = SP;
SP = SP - imm16;
}
:ENTER imm16,enterFrames is $(LONGMODE_OFF) & vexMode=0 & addrsize=1 & opsize=0 & byte=0xc8; imm16; enterFrames & low5=0x01 {
push42(BP);
frameTemp:2 = SP;
push42(frameTemp);
BP = frameTemp;
SP = SP - imm16;
}
:ENTER imm16,enterFrames is $(LONGMODE_OFF) & vexMode=0 & addrsize=1 & opsize=0 & byte=0xc8; imm16; enterFrames { :ENTER imm16,enterFrames is $(LONGMODE_OFF) & vexMode=0 & addrsize=1 & opsize=0 & byte=0xc8; imm16; enterFrames {
push44(EBP); push42(BP);
frameTemp:4 = ESP; frameTemp:2 = SP;
@ifdef IA64 @ifdef IA64
ESPt:$(SIZE) = zext(ESP); ESPt:$(SIZE) = zext(ESP);
EBPt:$(SIZE) = zext(EBP); EBPt:$(SIZE) = zext(EBP);
@@ -3278,9 +3293,9 @@ enterFrames: low5 is low5 { tmp:1 = low5; export tmp; }
ESP = ESP - tmp_offset; ESP = ESP - tmp_offset;
EBP = EBP - tmp_offset; EBP = EBP - tmp_offset;
push44(frameTemp); push42(frameTemp);
EBP = frameTemp; BP = frameTemp;
ESP = ESP - imm16; SP = SP - imm16;
} }
:ENTER imm16,enterFrames is $(LONGMODE_OFF) & vexMode=0 & addrsize=0 & byte=0xc8; imm16; enterFrames & low5=0x00 { :ENTER imm16,enterFrames is $(LONGMODE_OFF) & vexMode=0 & addrsize=0 & byte=0xc8; imm16; enterFrames & low5=0x00 {
@@ -3572,7 +3587,7 @@ enterFrames: low5 is low5 { tmp:1 = low5; export tmp; }
:IRETD is vexMode=0 & addrsize=1 & opsize=1 & byte=0xcf { pop44(EIP); tmp:4=0; pop44(tmp); CS=tmp(0); pop44(eflags); return [EIP]; } :IRETD is vexMode=0 & addrsize=1 & opsize=1 & byte=0xcf { pop44(EIP); tmp:4=0; pop44(tmp); CS=tmp(0); pop44(eflags); return [EIP]; }
@ifdef IA64 @ifdef IA64
:IRETD is $(LONGMODE_ON) & vexMode=0 & addrsize=2 & opsize=1 & byte=0xcf { pop84(RIP); tmp:8=0; pop84(tmp); CS=tmp(0); pop84(eflags); return [RIP]; } :IRETD is $(LONGMODE_ON) & vexMode=0 & addrsize=2 & opsize=1 & byte=0xcf { pop84(RIP); tmp:8=0; pop84(tmp); CS=tmp(0); pop84(eflags); return [RIP]; }
:IRETQ is $(LONGMODE_ON) & vexMode=0 & addrsize=2 & opsize=2 & byte=0xcf { pop88(RIP); tmp:8=0; pop88(tmp); CS=tmp(0); pop88(eflags); return [RIP]; } :IRETQ is $(LONGMODE_ON) & vexMode=0 & addrsize=2 & opsize=2 & byte=0xcf { pop88(RIP); tmp:8=0; pop88(tmp); CS=tmp(0); pop88(rflags); return [RIP]; }
@endif @endif
:J^cc rel8 is vexMode=0 & row=7 & cc; rel8 { if (cc) goto rel8; } :J^cc rel8 is vexMode=0 & row=7 & cc; rel8 { if (cc) goto rel8; }
@@ -3677,7 +3692,7 @@ enterFrames: low5 is low5 { tmp:1 = low5; export tmp; }
:LEAVE is $(LONGMODE_OFF) & vexMode=0 & addrsize=0 & opsize=0 & byte=0xc9 { SP = BP; pop22(BP); } :LEAVE is $(LONGMODE_OFF) & vexMode=0 & addrsize=0 & opsize=0 & byte=0xc9 { SP = BP; pop22(BP); }
:LEAVE is $(LONGMODE_OFF) & vexMode=0 & addrsize=0 & opsize=1 & byte=0xc9 { ESP = EBP; pop24(EBP); } :LEAVE is $(LONGMODE_OFF) & vexMode=0 & addrsize=0 & opsize=1 & byte=0xc9 { ESP = EBP; pop24(EBP); }
:LEAVE is $(LONGMODE_OFF) & vexMode=0 & addrsize=1 & opsize=1 & byte=0xc9 { ESP = EBP; pop44(EBP); } :LEAVE is $(LONGMODE_OFF) & vexMode=0 & addrsize=1 & opsize=1 & byte=0xc9 { ESP = EBP; pop44(EBP); }
:LEAVE is $(LONGMODE_OFF) & vexMode=0 & addrsize=1 & opsize=0 & byte=0xc9 { ESP = EBP; pop42(EBP); } :LEAVE is $(LONGMODE_OFF) & vexMode=0 & addrsize=1 & opsize=0 & byte=0xc9 { ESP = EBP; pop42(BP); }
@ifdef IA64 @ifdef IA64
:LEAVE is $(LONGMODE_ON) & vexMode=0 & opsize=0 & byte=0xc9 { RSP = RBP; pop82(BP); } :LEAVE is $(LONGMODE_ON) & vexMode=0 & opsize=0 & byte=0xc9 { RSP = RBP; pop82(BP); }
:LEAVE is $(LONGMODE_ON) & vexMode=0 & byte=0xc9 { RSP = RBP; pop88(RBP); } :LEAVE is $(LONGMODE_ON) & vexMode=0 & byte=0xc9 { RSP = RBP; pop88(RBP); }
@@ -4345,13 +4360,13 @@ define pcodeop rdtsc;
:RETF imm16 is vexMode=0 & addrsize=0 & opsize=0 & byte=0xca; imm16 { pop22(IP); EIP=zext(IP); pop22(CS); SP=SP+imm16; return [EIP]; } :RETF imm16 is vexMode=0 & addrsize=0 & opsize=0 & byte=0xca; imm16 { pop22(IP); EIP=zext(IP); pop22(CS); SP=SP+imm16; return [EIP]; }
:RETF imm16 is vexMode=0 & addrsize=1 & opsize=0 & byte=0xca; imm16 { pop42(IP); EIP=zext(IP); pop42(CS); ESP=ESP+imm16; return [EIP]; } :RETF imm16 is vexMode=0 & addrsize=1 & opsize=0 & byte=0xca; imm16 { pop42(IP); EIP=zext(IP); pop42(CS); ESP=ESP+imm16; return [EIP]; }
@ifdef IA64 @ifdef IA64
:RETF imm16 is $(LONGMODE_ON) & vexMode=0 & addrsize=2 & opsize=0 & byte=0xca; imm16 { pop42(IP); RIP=zext(IP); pop42(CS); RSP=RSP+imm16; return [RIP]; } :RETF imm16 is $(LONGMODE_ON) & vexMode=0 & addrsize=2 & opsize=0 & byte=0xca; imm16 { pop82(IP); RIP=zext(IP); pop82(CS); RSP=RSP+imm16; return [RIP]; }
@endif @endif
:RETF imm16 is vexMode=0 & addrsize=0 & opsize=1 & byte=0xca; imm16 { pop24(EIP); tmp:4=0; pop24(tmp); CS=tmp(0); SP=SP+imm16; return [EIP]; } :RETF imm16 is vexMode=0 & addrsize=0 & opsize=1 & byte=0xca; imm16 { pop24(EIP); tmp:4=0; pop24(tmp); CS=tmp(0); SP=SP+imm16; return [EIP]; }
:RETF imm16 is vexMode=0 & addrsize=1 & opsize=1 & byte=0xca; imm16 { pop44(EIP); tmp:4=0; pop44(tmp); CS=tmp(0); ESP=ESP+imm16; return [EIP]; } :RETF imm16 is vexMode=0 & addrsize=1 & opsize=1 & byte=0xca; imm16 { pop44(EIP); tmp:4=0; pop44(tmp); CS=tmp(0); ESP=ESP+imm16; return [EIP]; }
@ifdef IA64 @ifdef IA64
:RETF imm16 is $(LONGMODE_ON) & vexMode=0 & addrsize=2 & opsize=1 & byte=0xca; imm16 { pop44(EIP); tmp:4=0; pop44(tmp); RIP=zext(EIP); CS=tmp(0); RSP=RSP+imm16; return [RIP]; } :RETF imm16 is $(LONGMODE_ON) & vexMode=0 & addrsize=2 & opsize=1 & byte=0xca; imm16 { pop84(EIP); tmp:4=0; pop84(tmp); RIP=zext(EIP); CS=tmp(0); RSP=RSP+imm16; return [RIP]; }
:RETF imm16 is $(LONGMODE_ON) & vexMode=0 & addrsize=2 & opsize=2 & byte=0xca; imm16 { pop88(RIP); tmp:8=0; pop88(tmp); CS=tmp(0); RSP=RSP+imm16; return [RIP]; } :RETF imm16 is $(LONGMODE_ON) & vexMode=0 & addrsize=2 & opsize=2 & byte=0xca; imm16 { pop88(RIP); tmp:8=0; pop88(tmp); CS=tmp(0); RSP=RSP+imm16; return [RIP]; }
@endif @endif