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https://github.com/NationalSecurityAgency/ghidra.git
synced 2026-09-28 17:11:11 -09:00
Create and use LZCOUNT Pcode op
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@@ -117,7 +117,6 @@ define context contextreg
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ARMcondCk = (35,35) # Finished ARM condition check phase
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;
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define pcodeop count_leading_zeroes;
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define pcodeop coprocessor_function;
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define pcodeop coprocessor_function2;
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define pcodeop coprocessor_load;
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@@ -1608,7 +1608,7 @@ define pcodeop IndexCheck;
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:clz^ItCond Rd0811,Rm0003 is TMode=1 & ItCond & op4=0xfab & Rm0003; op12=15 & Rd0811
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{
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build ItCond;
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Rd0811 = count_leading_zeroes(Rm0003);
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Rd0811 = lzcount(Rm0003);
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}
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:cmn^ItCond Rn0003,ThumbExpandImm12 is TMode=1 & ItCond & (op11=0x1e & thc0909=0 & sop0508=8 & thc0404=1 & Rn0003; thc1515=0 & thc0811=15) & ThumbExpandImm12
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@@ -2484,7 +2484,7 @@ ArmPCRelImmed12: reloff is U23=0 & immed & rotate
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{
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build COND;
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build rm;
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Rd = count_leading_zeroes(rm);
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Rd = lzcount(rm);
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}
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@endif # VERSION_5
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@@ -19,7 +19,6 @@ import java.math.BigInteger;
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import ghidra.pcode.emulate.Emulate;
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import ghidra.pcode.emulate.EmulateInstructionStateModifier;
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import ghidra.pcode.emulate.callother.CountLeadingZerosOpBehavior;
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import ghidra.pcode.error.LowlevelError;
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import ghidra.program.model.address.Address;
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import ghidra.program.model.lang.Register;
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@@ -46,8 +45,6 @@ public class ARMEmulateInstructionStateModifier extends EmulateInstructionStateM
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aMode = new RegisterValue(TModeReg, BigInteger.ZERO);
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}
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registerPcodeOpBehavior("count_leading_zeroes", new CountLeadingZerosOpBehavior());
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/**
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* We could registerPcodeOpBehavior for one or more of the following pcodeop's:
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*
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@@ -85,7 +82,6 @@ public class ARMEmulateInstructionStateModifier extends EmulateInstructionStateM
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coprocessor_store2
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coprocessor_storelong
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coprocessor_storelong2
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count_leading_zeroes
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disableDataAbortInterrupts
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disableFIQinterrupts
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disableIRQinterrupts
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