From 3d54c90cd604f43bf3029f27f714c37b3b3cd806 Mon Sep 17 00:00:00 2001
From: vporok01 <58189503+vporok01@users.noreply.github.com>
Date: Fri, 30 May 2025 20:47:03 -0400
Subject: [PATCH] Fix RISC-V minu and max instructions' definitions (Closes
 #8215)

---
 Ghidra/Processors/RISCV/data/languages/riscv.rv32b.sinc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Ghidra/Processors/RISCV/data/languages/riscv.rv32b.sinc b/Ghidra/Processors/RISCV/data/languages/riscv.rv32b.sinc
index 41512c11c2..46852a2aea 100644
--- a/Ghidra/Processors/RISCV/data/languages/riscv.rv32b.sinc
+++ b/Ghidra/Processors/RISCV/data/languages/riscv.rv32b.sinc
@@ -52,13 +52,13 @@
 #TODO  fix op2026
 :grevi rd, rs1, op2026 is op0006=0x13 & op1214=0x5 & op2731=0xd & op2026 & rd & rs1 unimpl
 
-:max  rd, rs1, rs2 is op0006=0x33 & op1214=0x5 & op2531=0x5 & rd & rs1 & rs2 unimpl
+:max  rd, rs1, rs2 is op0006=0x33 & op1214=0x6 & op2531=0x5 & rd & rs1 & rs2 unimpl
 
 :maxu rd, rs1, rs2 is op0006=0x33 & op1214=0x7 & op2531=0x5 & rd & rs1 & rs2 unimpl
 
 :min  rd, rs1, rs2 is op0006=0x33 & op1214=0x4 & op2531=0x5 & rd & rs1 & rs2 unimpl
 
-:minu rd, rs1, rs2 is op0006=0x33 & op1214=0x6 & op2531=0x5 & rd & rs1 & rs2 unimpl
+:minu rd, rs1, rs2 is op0006=0x33 & op1214=0x5 & op2531=0x5 & rd & rs1 & rs2 unimpl
 
 :orn  rd, rs1, rs2 is op0006=0x33 & op1214=0x6 & op2531=0x20 & rd & rs1 & rs2 unimpl