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GP-5581: Allow optimization by truncation of subpieced unique varnodes.

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Dan
2025-08-18 17:12:23 +00:00
parent e90c852353
commit 42115f6df0
20 changed files with 798 additions and 482 deletions
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8
Ghidra/Processors/PowerPC/data/languages/SPE_APU.sinc
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@@ -2088,9 +2088,9 @@ define pcodeop VectorMultiplyWordHighSignedSaturateFractionalToAccumulator2;
# RT.h = temp.l;
lo:$(REGISTER_SIZE) = (( A & (0x0000000000000000) ) >> 32) * (( B & (0x0000000000000000) ) >> 32);
lo = lo:4;
lo = zext(lo:4);
hi:$(REGISTER_SIZE) = (( A & (0xFFFFFFFF00000000) ) >> 32) * (( B & (0xFFFFFFFF00000000) ) >> 32);
hi = hi:4;
hi = zext(hi:4);
D = (( zext(hi) << 32) | zext(lo) );
}
@@ -2106,9 +2106,9 @@ define pcodeop VectorMultiplyWordHighSignedSaturateFractionalToAccumulator2;
# ACC = RT;
lo:$(REGISTER_SIZE) = (( A & (0x0000000000000000) ) >> 32) * (( B & (0x0000000000000000) ) >> 32);
lo = lo:4;
lo = zext(lo:4);
hi:$(REGISTER_SIZE) = (( A & (0xFFFFFFFF00000000) ) >> 32) * (( B & (0xFFFFFFFF00000000) ) >> 32);
hi = hi:4;
hi = zext(hi:4);
D = (( zext(hi) << 32) | zext(lo) );
ACC = D;
}

3
Ghidra/Processors/PowerPC/data/languages/altivec.sinc
View File

@@ -1764,7 +1764,8 @@ define pcodeop altv300_71;
{
local offs:2 = (12 - zext(A[0,4])) * 8;
local out:16 = (vrB >> offs) & 0xffffffff;
D = out:4;
# No need for zext, as mask is already applied
D = out:$(REGISTER_SIZE);
}
:vextuwrx D,A,vrB is OP=4 & D & A & vrB & XOP_0_10=1933 {