From 4a68bdc58e608d34e51184b91f5bdd49e3215c65 Mon Sep 17 00:00:00 2001
From: emteere <47253321+emteere@users.noreply.github.com>
Date: Wed, 29 Nov 2023 16:43:18 -0500
Subject: [PATCH] GP-4018 added MXCSR x86 mmx status register to compiler spec
 globals list

---
 Ghidra/Processors/x86/data/languages/x86-64-gcc.cspec | 1 +
 Ghidra/Processors/x86/data/languages/x86-64-win.cspec | 1 +
 Ghidra/Processors/x86/data/languages/x86gcc.cspec     | 1 +
 Ghidra/Processors/x86/data/languages/x86win.cspec     | 1 +
 4 files changed, 4 insertions(+)

diff --git a/Ghidra/Processors/x86/data/languages/x86-64-gcc.cspec b/Ghidra/Processors/x86/data/languages/x86-64-gcc.cspec
index df20e918fd..5e7bcb462f 100644
--- a/Ghidra/Processors/x86/data/languages/x86-64-gcc.cspec
+++ b/Ghidra/Processors/x86/data/languages/x86-64-gcc.cspec
@@ -25,6 +25,7 @@
 
   <global>
     <range space="ram"/>
+    <register name="MXCSR"/>
   </global>
   <stackpointer register="RSP" space="ram"/>
   <returnaddress>
diff --git a/Ghidra/Processors/x86/data/languages/x86-64-win.cspec b/Ghidra/Processors/x86/data/languages/x86-64-win.cspec
index 8eb855edae..b341497319 100644
--- a/Ghidra/Processors/x86/data/languages/x86-64-win.cspec
+++ b/Ghidra/Processors/x86/data/languages/x86-64-win.cspec
@@ -35,6 +35,7 @@
   
   <global>
     <range space="ram"/>
+    <register name="MXCSR"/>
   </global>
   <stackpointer register="RSP" space="ram"/>
   <returnaddress>
diff --git a/Ghidra/Processors/x86/data/languages/x86gcc.cspec b/Ghidra/Processors/x86/data/languages/x86gcc.cspec
index 0cda278b61..f9d5d04bf2 100644
--- a/Ghidra/Processors/x86/data/languages/x86gcc.cspec
+++ b/Ghidra/Processors/x86/data/languages/x86gcc.cspec
@@ -25,6 +25,7 @@
   <global>
     <range space="ram"/>
     <range space="OTHER"/>
+    <register name="MXCSR"/>
   </global>
   <stackpointer register="ESP" space="ram"/>
   <returnaddress>
diff --git a/Ghidra/Processors/x86/data/languages/x86win.cspec b/Ghidra/Processors/x86/data/languages/x86win.cspec
index e61b3ada4d..d759822606 100644
--- a/Ghidra/Processors/x86/data/languages/x86win.cspec
+++ b/Ghidra/Processors/x86/data/languages/x86win.cspec
@@ -28,6 +28,7 @@
   
   <global>
     <range space="ram"/>
+    <register name="MXCSR"/>
   </global>
   <stackpointer register="ESP" space="ram"/>
   <returnaddress>