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Merge remote-tracking branch 'origin/GP-3863_James_AARCH64_volatile_regs--SQUASHED' into Ghidra_10.4

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Ryan Kurtz
2023-09-22 09:27:59 -04:00
parent 3bb95e85ef 034a0b28ad
commit 5c8251f891
3 changed files with 1 additions and 7 deletions
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3
Ghidra/Processors/AARCH64/data/languages/AARCH64.cspec
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@@ -25,9 +25,6 @@
<global> <global>
<range space="ram"/> <range space="ram"/>
<!-- The decompiler will treat registers in this range as global variables.
ie: tmp_ldWn, tmp_ldXn, tmp_stWn, tmp_stXn -->
<range space="register" first="0x3000" last="0x3fff"/>
</global> </global>
<stackpointer register="sp" space="ram"/> <stackpointer register="sp" space="ram"/>

2
Ghidra/Processors/AARCH64/data/languages/AARCH64.pspec
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@@ -27,7 +27,7 @@
</default_symbols> </default_symbols>
<volatile outputop="cWrite" inputop="cRead"> <volatile outputop="cWrite" inputop="cRead">
<range space="register" first="0x1000" last="0x3fff"/> <range space="register" first="0x1000" last="0x2fff"/>
</volatile> </volatile>
<register_data> <register_data>

3
Ghidra/Processors/AARCH64/data/languages/AARCH64_ilp32.cspec
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@@ -25,9 +25,6 @@
<global> <global>
<range space="ram"/> <range space="ram"/>
<!-- The decompiler will treat registers in this range as global variables.
ie: tmp_ldWn, tmp_ldXn, tmp_stWn, tmp_stXn -->
<range space="register" first="0x3000" last="0x3fff"/>
</global> </global>
<aggressivetrim signext="true"/> <!-- Aggressively try to eliminate sign extensions --> <aggressivetrim signext="true"/> <!-- Aggressively try to eliminate sign extensions -->