From 77665a8945274b683cae30e96f826197f95c99e5 Mon Sep 17 00:00:00 2001 From: ghidorahrex Date: Tue, 17 Sep 2019 12:03:46 -0400 Subject: [PATCH] GT-3159: PowerPC: corrected e_rlwimi and e_rlwinm VLE bit patterns. Corrected wrteei bit pattern. --- .../PowerPC/data/languages/ppc_embedded.sinc | 4 ++-- .../PowerPC/data/languages/ppc_vle.sinc | 24 +++++++++---------- 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/Ghidra/Processors/PowerPC/data/languages/ppc_embedded.sinc b/Ghidra/Processors/PowerPC/data/languages/ppc_embedded.sinc index b3b4ce7268..8c3e82e48f 100644 --- a/Ghidra/Processors/PowerPC/data/languages/ppc_embedded.sinc +++ b/Ghidra/Processors/PowerPC/data/languages/ppc_embedded.sinc @@ -211,7 +211,7 @@ } #wrteei 0 0x7c 00 01 46 -:wrteei BIT_16 is OP=31 & BIT_16 & XOP_1_10=163 +:wrteei BIT_15 is OP=31 & BIT_15 & XOP_1_10=163 { - WriteExternalEnableImmediate(BIT_16:1); + WriteExternalEnableImmediate(BIT_15:1); } diff --git a/Ghidra/Processors/PowerPC/data/languages/ppc_vle.sinc b/Ghidra/Processors/PowerPC/data/languages/ppc_vle.sinc index ddba890258..587a4e4e61 100644 --- a/Ghidra/Processors/PowerPC/data/languages/ppc_vle.sinc +++ b/Ghidra/Processors/PowerPC/data/languages/ppc_vle.sinc @@ -800,37 +800,37 @@ IMM16B: val is IMM_0_10_VLE & IMM_16_20_VLE [ val = (IMM_16_20_VLE << 11) | } # The manual uses MB instead of NB here, but because the "MB" symbol is already taken, NB it is -:e_rlwimi A,S,SHL,NB,ME is $(ISVLE) & OP=29 & BIT_0=0 & NB & ME & A & SHL & S { +:e_rlwimi A,S,SHL,MBL,ME is $(ISVLE) & OP=29 & BIT_0=0 & MBL & ME & A & SHL & S { tmpS:4 = S:4; tmpA:4 = (tmpS << SHL) | (tmpS >> (32 - SHL)); tmpM:4 = ~0:4; - if (ME:1 < NB:1) goto ; - tmpM = tmpM << NB; - tmpM = tmpM >> ((31-ME) + NB); + if (ME:1 < MBL:1) goto ; + tmpM = tmpM << MBL; + tmpM = tmpM >> ((31-ME) + MBL); tmpM = tmpM << (31-ME); goto ; tmpM = tmpM << ME; - tmpM = tmpM >> ((31-NB) + ME); - tmpM = tmpM << (31-NB); + tmpM = tmpM >> ((31-MBL) + ME); + tmpM = tmpM << (31-MBL); tmpM = ~tmpM; A = zext(tmpA & tmpM) | (A & zext(~tmpM)); } -:e_rlwinm A,S,SHL,NB,ME is $(ISVLE) & OP=29 & BIT_0=1 & NB & ME & A & SHL & S { +:e_rlwinm A,S,SHL,MBL,ME is $(ISVLE) & OP=29 & BIT_0=1 & MBL & ME & A & SHL & S { tmpS:4 = S:4; tmpA:4 = (tmpS << SHL) | (tmpS >> (32 - SHL)); tmpM:4 = ~0:4; - if (ME:1 < NB:1) goto ; - tmpM = tmpM << NB; - tmpM = tmpM >> ((31-ME) + NB); + if (ME:1 < MBL:1) goto ; + tmpM = tmpM << MBL; + tmpM = tmpM >> ((31-ME) + MBL); tmpM = tmpM << (31-ME); goto ; tmpM = tmpM << ME; - tmpM = tmpM >> ((31-NB) + ME); - tmpM = tmpM << (31-NB); + tmpM = tmpM >> ((31-MBL) + ME); + tmpM = tmpM << (31-MBL); tmpM = ~tmpM; A = zext(tmpA & tmpM);