diff --git a/Ghidra/Processors/x86/certification.manifest b/Ghidra/Processors/x86/certification.manifest
index f5a07f0c15..c0acec77c7 100644
--- a/Ghidra/Processors/x86/certification.manifest
+++ b/Ghidra/Processors/x86/certification.manifest
@@ -23,7 +23,6 @@ data/languages/old/x86smmV1.lang||GHIDRA||||END|
 data/languages/old/x86smmV1.trans||GHIDRA||||END|
 data/languages/pclmulqdq.sinc||GHIDRA||||END|
 data/languages/rdrand.sinc||GHIDRA||||END|
-data/languages/rdseed.sinc||GHIDRA||||END|
 data/languages/sgx.sinc||GHIDRA||||END|
 data/languages/sha.sinc||GHIDRA||||END|
 data/languages/smx.sinc||GHIDRA||||END|
diff --git a/Ghidra/Processors/x86/data/languages/rdrand.sinc b/Ghidra/Processors/x86/data/languages/rdrand.sinc
index caf3cc1756..4037bb95dc 100644
--- a/Ghidra/Processors/x86/data/languages/rdrand.sinc
+++ b/Ghidra/Processors/x86/data/languages/rdrand.sinc
@@ -1,7 +1,51 @@
 define pcodeop rdrand;
 define pcodeop rdrandIsValid;
-:RDRAND rm16     is vexMode=0 & opsize=0 & byte=0x0f; byte=0xC7; (rm16 & reg_opcode=6 ...) { rm16 = rdrand(); CF=rdrandIsValid(); }
-:RDRAND rm32     is vexMode=0 & opsize=1 & byte=0x0f; byte=0xC7; (rm32 & reg_opcode=6 ...) { rm32 = rdrand(); CF=rdrandIsValid(); }
+
+macro rdflags(){
+	OF = 0; SF = 0; ZF = 0; AF = 0; PF = 0;
+}
+
+:RDRAND Rmr16     is vexMode=0 & opsize=0 & byte=0x0f; byte=0xC7; mod=3 & Rmr16 & reg_opcode=6 
+{ 
+	Rmr16 = rdrand(); 
+	CF=rdrandIsValid();
+	rdflags();
+	
+}
+:RDRAND Rmr32     is vexMode=0 & opsize=1 & byte=0x0f; byte=0xC7; mod=3 & Rmr32 & reg_opcode=6 
+{ 
+	Rmr32 = rdrand(); 
+	CF=rdrandIsValid();
+	rdflags();
+}
 @ifdef IA64
-:RDRAND rm64     is $(LONGMODE_ON) & vexMode=0 & opsize=2 & $(REX_W) & byte=0x0f; byte=0xC7; (rm64 & reg_opcode=6 ...) { rm64 = rdrand(); CF=rdrandIsValid(); }
+:RDRAND Rmr64     is $(LONGMODE_ON) & vexMode=0 & opsize=2 & $(REX_W) & byte=0x0f; byte=0xC7; mod=3 & Rmr64 & reg_opcode=6 
+{ 
+	Rmr64 = rdrand(); 
+	CF=rdrandIsValid();
+	rdflags();
+}
+@endif
+
+define pcodeop rdseed;
+define pcodeop rdseedIsValid;
+:RDSEED Rmr16     is vexMode=0 & opsize=0 & byte=0x0f; byte=0xC7; mod=3 & Rmr16 & reg_opcode=7 
+{ 
+	Rmr16 = rdseed(); 
+	CF=rdseedIsValid();
+	rdflags();
+}
+:RDSEED Rmr32     is vexMode=0 & opsize=1 & byte=0x0f; byte=0xC7; mod=3 & Rmr32 & reg_opcode=7 
+{ 
+	Rmr32 = rdseed(); 
+	CF=rdseedIsValid();
+	rdflags();
+}
+@ifdef IA64
+:RDSEED Rmr64     is $(LONGMODE_ON) & vexMode=0 & opsize=2 & $(REX_W) & byte=0x0f; byte=0xC7; mod=3 & Rmr64 & reg_opcode=7 
+{ 
+	Rmr64 = rdseed(); 
+	CF=rdseedIsValid();
+	rdflags();
+}
 @endif
diff --git a/Ghidra/Processors/x86/data/languages/rdseed.sinc b/Ghidra/Processors/x86/data/languages/rdseed.sinc
deleted file mode 100644
index 1718f35d7f..0000000000
--- a/Ghidra/Processors/x86/data/languages/rdseed.sinc
+++ /dev/null
@@ -1,7 +0,0 @@
-define pcodeop rdseed;
-define pcodeop rdseedIsValid;
-:RDSEED r16     is vexMode=0 & opsize=0 & byte=0x0f; byte=0xC7; r16 & reg_opcode=7 { r16 = rdseed(); CF=rdseedIsValid(); }
-:RDSEED r32     is vexMode=0 & opsize=1 & byte=0x0f; byte=0xC7; r32 & reg_opcode=7 { r32 = rdseed(); CF=rdseedIsValid(); }
-@ifdef IA64
-:RDSEED r64     is $(LONGMODE_ON) & vexMode=0 & opsize=2 & $(REX_W) & byte=0x0f; byte=0xC7; r64 & reg_opcode=7 { r64 = rdseed(); CF=rdseedIsValid(); }
-@endif
diff --git a/Ghidra/Processors/x86/data/languages/x86-64.slaspec b/Ghidra/Processors/x86/data/languages/x86-64.slaspec
index cdc75e7cd2..4b1ccf9793 100644
--- a/Ghidra/Processors/x86/data/languages/x86-64.slaspec
+++ b/Ghidra/Processors/x86/data/languages/x86-64.slaspec
@@ -5,7 +5,6 @@
 @include "avx2.sinc"
 @include "avx2_manual.sinc"
 @include "rdrand.sinc"
-@include "rdseed.sinc"
 @include "sgx.sinc"
 @include "adx.sinc"
 @include "clwb.sinc"
diff --git a/Ghidra/Processors/x86/data/languages/x86.slaspec b/Ghidra/Processors/x86/data/languages/x86.slaspec
index 49194af394..8a4bbee102 100644
--- a/Ghidra/Processors/x86/data/languages/x86.slaspec
+++ b/Ghidra/Processors/x86/data/languages/x86.slaspec
@@ -14,4 +14,3 @@
 @include "smx.sinc"
 @include "cet.sinc"
 @include "rdrand.sinc"
-@include "rdseed.sinc"
\ No newline at end of file