From c1f97cde08ab235c0fe9adb723971a608550fdc2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Odin=20Dahlstr=C3=B6m?= Date: Mon, 22 Dec 2025 19:47:24 +0100 Subject: [PATCH] Fix missing Altivec vadduws instruction --- Ghidra/Processors/PowerPC/data/languages/altivec.sinc | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/Ghidra/Processors/PowerPC/data/languages/altivec.sinc b/Ghidra/Processors/PowerPC/data/languages/altivec.sinc index 720a3df089..2acecf52b0 100644 --- a/Ghidra/Processors/PowerPC/data/languages/altivec.sinc +++ b/Ghidra/Processors/PowerPC/data/languages/altivec.sinc @@ -381,11 +381,10 @@ vaddubm_part2: is vrA_8_8 & vrA_8_9 & vrA_8_10 & vrA_8_11 & vrA_8_12 & vrA_8_13 vrD_32_3 = vrA_32_3 + vrB_32_3; } -# Collides with vadduws -# :vadduws vrD,vrA,vrB is OP=4 & vrD & vrA & vrB & XOP_0_10=640 -# { # TODO definition -# vrD = vectorAddUnsignedWordSaturate(vrA,vrB); -# } +:vadduws vrD,vrA,vrB is OP=4 & vrD & vrA & vrB & XOP_0_10=640 +{ # TODO definition + vrD = vectorAddUnsignedWordSaturate(vrA,vrB); +} :vand vrD,vrA,vrB is OP=4 & vrD & vrA & vrB & XOP_0_10=1028 { # TODO definition