From cfd917ac26172639c8fcb773eff615dd91f74f51 Mon Sep 17 00:00:00 2001 From: ghidra1 Date: Thu, 26 Sep 2019 14:53:52 -0400 Subject: [PATCH] GT-3191 corercted AARCH64 BLR instruction semantics when x30 is operand --- Ghidra/Processors/AARCH64/data/languages/AARCH64base.sinc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Ghidra/Processors/AARCH64/data/languages/AARCH64base.sinc b/Ghidra/Processors/AARCH64/data/languages/AARCH64base.sinc index 8cc018aaf4..b40c325f3b 100644 --- a/Ghidra/Processors/AARCH64/data/languages/AARCH64base.sinc +++ b/Ghidra/Processors/AARCH64/data/languages/AARCH64base.sinc @@ -872,8 +872,8 @@ is b_31=1 & b_2630=0x05 & Addr26 :blr Rn_GPR64 is b_2531=0x6b & b_2324=0 & b_2122=1 & b_1620=0x1f & b_1015=0 & Rn_GPR64 & b_0004=0 { - x30 = inst_start + 4; pc = Rn_GPR64; + x30 = inst_start + 4; call [pc]; }