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GP-4030: Fix MIPS base and eabi 32/64-bit cspecs

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GP-4029: Update base PowerPC 32/64-bit cspecs
This commit is contained in:
ghintern
2025-02-25 20:50:19 +00:00
committed by James
parent 12ac4660a1
commit d91aebe74e
26 changed files with 1234 additions and 488 deletions
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6
Ghidra/Processors/PowerPC/certification.manifest
View File

@@ -20,10 +20,10 @@ data/languages/old/oldPPC.lang||GHIDRA||||END|
data/languages/old/oldPPC.trans||GHIDRA||||END|
data/languages/ppc.dwarf||GHIDRA||||END|
data/languages/ppc.ldefs||GHIDRA||||END|
data/languages/ppc_32.cspec||GHIDRA||||END|
data/languages/ppc_32.pspec||GHIDRA||||END|
data/languages/ppc_32_4xx_be.slaspec||GHIDRA||||END|
data/languages/ppc_32_4xx_le.slaspec||GHIDRA||||END|
data/languages/ppc_32_be.cspec||GHIDRA||||END|
data/languages/ppc_32_be.slaspec||GHIDRA||||END|
data/languages/ppc_32_be_Mac.cspec||GHIDRA||||END|
data/languages/ppc_32_e500_be.cspec||GHIDRA||||END|
@@ -34,14 +34,13 @@ data/languages/ppc_32_e500mc_be.cspec||GHIDRA||||END|
data/languages/ppc_32_e500mc_be.slaspec||GHIDRA||||END|
data/languages/ppc_32_e500mc_le.cspec||GHIDRA||||END|
data/languages/ppc_32_e500mc_le.slaspec||GHIDRA||||END|
data/languages/ppc_32_le.cspec||GHIDRA||||END|
data/languages/ppc_32_le.slaspec||GHIDRA||||END|
data/languages/ppc_32_mpc8270.pspec||GHIDRA||||END|
data/languages/ppc_32_quicciii_be.slaspec||GHIDRA||||END|
data/languages/ppc_32_quicciii_le.slaspec||GHIDRA||||END|
data/languages/ppc_64.cspec||GHIDRA||||END|
data/languages/ppc_64.pspec||GHIDRA||||END|
data/languages/ppc_64_32.cspec||GHIDRA||||END|
data/languages/ppc_64_be.cspec||GHIDRA||||END|
data/languages/ppc_64_be.slaspec||GHIDRA||||END|
data/languages/ppc_64_be_Mac.cspec||GHIDRA||||END|
data/languages/ppc_64_isa_altivec_be.slaspec||GHIDRA||||END|
@@ -50,6 +49,7 @@ data/languages/ppc_64_isa_altivec_vle_be.slaspec||GHIDRA||||END|
data/languages/ppc_64_isa_be.slaspec||GHIDRA||||END|
data/languages/ppc_64_isa_le.slaspec||GHIDRA||||END|
data/languages/ppc_64_isa_vle_be.slaspec||GHIDRA||||END|
data/languages/ppc_64_le.cspec||GHIDRA||||END|
data/languages/ppc_64_le.slaspec||GHIDRA||||END|
data/languages/ppc_a2.sinc||GHIDRA||||END|
data/languages/ppc_common.sinc||GHIDRA||||END|

28
Ghidra/Processors/PowerPC/data/languages/ppc.ldefs
View File

@@ -11,7 +11,7 @@
manualindexfile="../manuals/PowerPC.idx"
id="PowerPC:BE:32:default">
<description>PowerPC 32-bit big endian w/Altivec, G2</description>
<compiler name="default" spec="ppc_32_be.cspec" id="default"/>
<compiler name="default" spec="ppc_32.cspec" id="default"/>
<compiler name="Mac OS X" spec="ppc_32_be_Mac.cspec" id="macosx"/>
<external_name tool="gnu" name="powerpc:common"/>
<external_name tool="IDA-PRO" name="ppc"/>
@@ -29,8 +29,8 @@
manualindexfile="../manuals/PowerPC.idx"
id="PowerPC:LE:32:default">
<description>PowerPC 32-bit little endian w/Altivec, G2</description>
<compiler name="default" spec="ppc_32_le.cspec" id="default"/>
<compiler name="Visual Studio" spec="ppc_32_le.cspec" id="windows"/>
<compiler name="default" spec="ppc_32.cspec" id="default"/>
<compiler name="Visual Studio" spec="ppc_32.cspec" id="windows"/>
<external_name tool="gnu" name="powerpc:common"/>
<external_name tool="IDA-PRO" name="ppcl"/>
<external_name tool="DWARF.register.mapping.file" name="ppc.dwarf"/>
@@ -45,7 +45,7 @@
manualindexfile="../manuals/PowerPC.idx"
id="PowerPC:BE:64:default">
<description>PowerPC 64-bit big endian w/Altivec, G2</description>
<compiler name="default" spec="ppc_64.cspec" id="default"/>
<compiler name="default" spec="ppc_64_be.cspec" id="default"/>
<compiler name="Mac OS X" spec="ppc_64_be_Mac.cspec" id="macosx"/>
<external_name tool="gnu" name="powerpc:common64"/>
<external_name tool="IDA-PRO" name="ppc"/>
@@ -98,7 +98,7 @@
manualindexfile="../manuals/PowerPC.idx"
id="PowerPC:LE:64:default">
<description>PowerPC 64-bit little endian w/Altivec, G2</description>
<compiler name="default" spec="ppc_64.cspec" id="default"/>
<compiler name="default" spec="ppc_64_le.cspec" id="default"/>
<external_name tool="gnu" name="powerpc:common64"/>
<external_name tool="IDA-PRO" name="ppcl"/>
<external_name tool="DWARF.register.mapping.file" name="ppc.dwarf"/>
@@ -115,7 +115,7 @@
manualindexfile="../manuals/PowerPC.idx"
id="PowerPC:BE:32:4xx">
<description>PowerPC 4xx 32-bit big endian embedded core</description>
<compiler name="default" spec="ppc_32_be.cspec" id="default"/>
<compiler name="default" spec="ppc_32.cspec" id="default"/>
<external_name tool="gnu" name="powerpc:403"/>
<external_name tool="IDA-PRO" name="ppc"/>
<external_name tool="DWARF.register.mapping.file" name="ppc.dwarf"/>
@@ -132,8 +132,8 @@
manualindexfile="../manuals/PowerPC.idx"
id="PowerPC:LE:32:4xx">
<description>PowerPC 4xx 32-bit little endian embedded core</description>
<compiler name="default" spec="ppc_32_le.cspec" id="default"/>
<compiler name="Visual Studio" spec="ppc_32_le.cspec" id="windows"/>
<compiler name="default" spec="ppc_32.cspec" id="default"/>
<compiler name="Visual Studio" spec="ppc_32.cspec" id="windows"/>
<external_name tool="gnu" name="powerpc:403"/>
<external_name tool="IDA-PRO" name="ppcl"/>
<external_name tool="DWARF.register.mapping.file" name="ppc.dwarf"/>
@@ -148,7 +148,7 @@
manualindexfile="../manuals/PowerPC.idx"
id="PowerPC:BE:32:MPC8270">
<description>Freescale MPC8280 32-bit big endian family (PowerQUICC-III)</description>
<compiler name="default" spec="ppc_32_be.cspec" id="default"/>
<compiler name="default" spec="ppc_32.cspec" id="default"/>
<external_name tool="gnu" name="powerpc:MPC8XX"/>
<external_name tool="IDA-PRO" name="ppc"/>
<external_name tool="DWARF.register.mapping.file" name="ppc.dwarf"/>
@@ -165,7 +165,7 @@
manualindexfile="../manuals/PowerPC.idx"
id="PowerPC:BE:32:QUICC">
<description>PowerQUICC-III 32-bit big endian family</description>
<compiler name="default" spec="ppc_32_be.cspec" id="default"/>
<compiler name="default" spec="ppc_32.cspec" id="default"/>
<external_name tool="gnu" name="powerpc:MPC8XX"/>
<external_name tool="IDA-PRO" name="ppc"/>
<external_name tool="DWARF.register.mapping.file" name="ppc.dwarf"/>
@@ -182,8 +182,8 @@
manualindexfile="../manuals/PowerPC.idx"
id="PowerPC:LE:32:QUICC">
<description>PowerQUICC-III 32-bit little endian family</description>
<compiler name="default" spec="ppc_32_le.cspec" id="default"/>
<compiler name="Visual Studio" spec="ppc_32_le.cspec" id="windows"/>
<compiler name="default" spec="ppc_32.cspec" id="default"/>
<compiler name="Visual Studio" spec="ppc_32.cspec" id="windows"/>
<external_name tool="gnu" name="powerpc:MPC8XX"/>
<external_name tool="IDA-PRO" name="ppcl"/>
<external_name tool="DWARF.register.mapping.file" name="ppc.dwarf"/>
@@ -334,7 +334,7 @@
manualindexfile="../manuals/PowerISA.idx"
id="PowerPC:BE:64:A2ALT">
<description>Power ISA 3.0 Big Endian w/Altivec</description>
<compiler name="default" spec="ppc_64.cspec" id="default"/>
<compiler name="default" spec="ppc_64_be.cspec" id="default"/>
<external_name tool="gnu" name="powerpc:e500mc"/>
<external_name tool="IDA-PRO" name="ppc"/>
<external_name tool="DWARF.register.mapping.file" name="ppc.dwarf"/>
@@ -351,7 +351,7 @@
manualindexfile="../manuals/PowerISA.idx"
id="PowerPC:LE:64:A2ALT">
<description>Power ISA 3.0 Little Endian w/Altivec</description>
<compiler name="default" spec="ppc_64.cspec" id="default"/>
<compiler name="default" spec="ppc_64_le.cspec" id="default"/>
<external_name tool="gnu" name="powerpc:e500mc"/>
<external_name tool="IDA-PRO" name="ppcl"/>
<external_name tool="DWARF.register.mapping.file" name="ppc.dwarf"/>

70
Ghidra/Processors/PowerPC/data/languages/ppc_32_be.cspec → Ghidra/Processors/PowerPC/data/languages/ppc_32.cspec
View File

@@ -32,21 +32,6 @@
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f8"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f9"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f10"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f11"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f12"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f13"/>
</pentry>
<pentry minsize="1" maxsize="4">
<register name="r3"/>
</pentry>
@@ -74,6 +59,26 @@
<pentry minsize="1" maxsize="500" align="4">
<addr offset="8" space="stack"/>
</pentry>
<rule>
<datatype name="float"/>
<consume storage="float"/>
</rule>
<rule>
<datatype name="float"/>
<goto_stack/>
</rule>
<rule>
<datatype name="struct"/>
<convert_to_ptr/>
</rule>
<rule>
<datatype name="union"/>
<convert_to_ptr/>
</rule>
<rule>
<datatype name="any"/>
<join align="true"/>
</rule>
</input>
<output>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
@@ -82,9 +87,17 @@
<pentry minsize="1" maxsize="4" extension="inttype">
<register name="r3"/>
</pentry>
<pentry minsize="5" maxsize="8">
<addr space="join" piece1="r3" piece2="r4"/>
<pentry minsize="1" maxsize="4" extension="inttype">
<register name="r4"/>
</pentry>
<rule>
<datatype name="float"/>
<consume storage="float"/>
</rule>
<rule>
<datatype name="any"/>
<join/>
</rule>
</output>
<unaffected>
<register name="r1"/> <!-- stack pointer -->
@@ -108,10 +121,33 @@
<register name="r29"/>
<register name="r30"/>
<register name="r31"/>
<register name="f14"/>
<register name="f15"/>
<register name="f16"/>
<register name="f17"/>
<register name="f18"/>
<register name="f19"/>
<register name="f20"/>
<register name="f21"/>
<register name="f22"/>
<register name="f23"/>
<register name="f24"/>
<register name="f25"/>
<register name="f26"/>
<register name="f27"/>
<register name="f28"/>
<register name="f29"/>
<register name="f30"/>
<register name="f31"/>
<register name="cr2"/>
<register name="cr3"/>
<register name="cr4"/>
</unaffected>
<killedbycall>
<register name="r3"/>
<register name="r4"/>
<register name="f1"/>
</killedbycall>
</prototype>
</default_proto>

127
Ghidra/Processors/PowerPC/data/languages/ppc_32_le.cspec
View File

@@ -1,127 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<compiler_spec>
<global>
<range space="ram"/>
</global>
<stackpointer register="r1" space="ram"/>
<default_proto>
<prototype name="__stdcall" extrapop="0" stackshift="0">
<input pointermax="8">
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f1"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f2"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f3"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f4"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f5"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f6"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f7"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f8"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f9"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f10"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f11"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f12"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f13"/>
</pentry>
<pentry minsize="1" maxsize="4">
<register name="r3"/>
</pentry>
<pentry minsize="1" maxsize="4">
<register name="r4"/>
</pentry>
<pentry minsize="1" maxsize="4">
<register name="r5"/>
</pentry>
<pentry minsize="1" maxsize="4">
<register name="r6"/>
</pentry>
<pentry minsize="1" maxsize="4">
<register name="r7"/>
</pentry>
<pentry minsize="1" maxsize="4">
<register name="r8"/>
</pentry>
<pentry minsize="1" maxsize="4">
<register name="r9"/>
</pentry>
<pentry minsize="1" maxsize="4">
<register name="r10"/>
</pentry>
<pentry minsize="1" maxsize="500" align="4">
<addr offset="8" space="stack"/>
</pentry>
</input>
<output>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f1"/>
</pentry>
<pentry minsize="1" maxsize="4" extension="inttype">
<register name="r3"/>
</pentry>
<pentry minsize="5" maxsize="8">
<addr space="join" piece1="r4" piece2="r3"/>
</pentry>
</output>
<unaffected>
<register name="r1"/> <!-- stack pointer -->
<register name="r2"/> <!-- _SDA2_BASE_ -->
<register name="r13"/> <!-- _SDA_BASE_ -->
<register name="r14"/>
<register name="r15"/>
<register name="r16"/>
<register name="r17"/>
<register name="r18"/>
<register name="r19"/>
<register name="r20"/>
<register name="r21"/>
<register name="r22"/>
<register name="r23"/>
<register name="r24"/>
<register name="r25"/>
<register name="r26"/>
<register name="r27"/>
<register name="r28"/>
<register name="r29"/>
<register name="r30"/>
<register name="r31"/>
<register name="cr2"/>
<register name="cr3"/>
<register name="cr4"/>
</unaffected>
</prototype>
</default_proto>
<callfixup name="get_pc_thunk_lr">
<target name="__get_pc_thunk_lr"/>
<pcode>
<body><![CDATA[
LR = inst_dest + 4;
]]></body>
</pcode>
</callfixup>
</compiler_spec>

203
Ghidra/Processors/PowerPC/data/languages/ppc_64_be.cspec Normal file
View File

@@ -0,0 +1,203 @@
<?xml version="1.0" encoding="UTF-8"?>
<!-- This cspec is based upon the PowerPC 64-bit ELF ABI specification -->
<!-- Very similar to the PowerPC 64-bit little-endian cspec, but reverses justification when
assigning odd datatype sizes -->
<compiler_spec>
<data_organization>
<machine_alignment value="8" />
<default_alignment value="1" />
<default_pointer_alignment value="8" />
<pointer_size value="8" />
<wchar_size value="4" />
<short_size value="2" />
<integer_size value="4" />
<long_size value="8" />
<long_long_size value="8" />
<float_size value="4" />
<double_size value="8" />
<long_double_size value="16" />
<size_alignment_map>
<entry size="1" alignment="1" />
<entry size="2" alignment="2" />
<entry size="4" alignment="4" />
<entry size="8" alignment="8" />
<entry size="16" alignment="16" />
</size_alignment_map>
</data_organization>
<global>
<range space="ram"/>
</global>
<stackpointer register="r1" space="ram"/>
<default_proto>
<prototype name="__stdcall" extrapop="0" stackshift="0">
<input>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f1"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f2"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f3"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f4"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f5"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f6"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f7"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f8"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f9"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f10"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f11"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f12"/>
</pentry>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f13"/>
</pentry>
<pentry minsize="1" maxsize="8" extension="inttype">
<register name="r3"/>
</pentry>
<pentry minsize="1" maxsize="8" extension="inttype">
<register name="r4"/>
</pentry>
<pentry minsize="1" maxsize="8" extension="inttype">
<register name="r5"/>
</pentry>
<pentry minsize="1" maxsize="8" extension="inttype">
<register name="r6"/>
</pentry>
<pentry minsize="1" maxsize="8" extension="inttype">
<register name="r7"/>
</pentry>
<pentry minsize="1" maxsize="8" extension="inttype">
<register name="r8"/>
</pentry>
<pentry minsize="1" maxsize="8" extension="inttype">
<register name="r9"/>
</pentry>
<pentry minsize="1" maxsize="8" extension="inttype">
<register name="r10"/>
</pentry>
<pentry minsize="1" maxsize="500" align="8">
<addr offset="112" space="stack"/>
</pentry>
<rule>
<datatype name="homogeneous-float-aggregate" maxprimitives="1"/>
<join storage="float"/>
<extra_stack afterstorage="general" afterbytes="64"/>
<consume_extra storage="general"/>
</rule>
<rule>
<datatype name="float"/>
<join storage="float"/> <!-- The join is NOT aligned -->
<extra_stack afterstorage="general" afterbytes="64"/>
<consume_extra storage="general"/>
</rule>
<!-- Values are packed big-endian within registers, but packing registers and stack dwords
together is done in the little-endian fashion -->
<rule>
<datatype name="struct" minsize="8"/>
<join align="true" reversejustify="true"/>
</rule>
<rule>
<datatype name="union" minsize="8"/>
<join align="true" reversejustify="true"/>
</rule>
<rule>
<datatype name="any"/>
<join align="true"/> <!-- The join IS aligned -->
</rule>
</input>
<output>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f1"/>
</pentry>
<pentry minsize="1" maxsize="8" extension="inttype">
<register name="r3"/>
</pentry>
<rule>
<datatype name="struct"/>
<convert_to_ptr/>
</rule>
<rule>
<datatype name="union"/>
<convert_to_ptr/>
</rule>
</output>
<unaffected>
<register name="r14"/>
<register name="r15"/>
<register name="r16"/>
<register name="r17"/>
<register name="r18"/>
<register name="r19"/>
<register name="r20"/>
<register name="r21"/>
<register name="r22"/>
<register name="r23"/>
<register name="r24"/>
<register name="r25"/>
<register name="r26"/>
<register name="r27"/>
<register name="r28"/>
<register name="r29"/>
<register name="r30"/>
<register name="r31"/>
<register name="r1"/>
<!-- In cases where r2 does change, we assume it will get restored -->
<register name="r2"/>
<register name="r2Save"/>
<register name="f14"/>
<register name="f15"/>
<register name="f16"/>
<register name="f17"/>
<register name="f18"/>
<register name="f19"/>
<register name="f20"/>
<register name="f21"/>
<register name="f22"/>
<register name="f23"/>
<register name="f24"/>
<register name="f25"/>
<register name="f26"/>
<register name="f27"/>
<register name="f28"/>
<register name="f29"/>
<register name="f30"/>
<register name="f31"/>
<register name="cr2"/>
<register name="cr3"/>
<register name="cr4"/>
</unaffected>
<killedbycall>
<register name="r3"/>
<register name="f1"/>
</killedbycall>
<pcode inject="uponreturn">
<body>
# Inject pcode when returning from a function call to place the r2Save
# value into 0x28(r1) which should be restored by the "ld r2,0x28(r1)"
# which immediately follows calls which comply with the PPC64 ABI spec.
local saveR2ptr = r1 + 0x28;
*:8 saveR2ptr = r2Save;
</body>
</pcode>
</prototype>
</default_proto>
</compiler_spec>

87
Ghidra/Processors/PowerPC/data/languages/ppc_64.cspec → Ghidra/Processors/PowerPC/data/languages/ppc_64_le.cspec
View File

@@ -1,8 +1,28 @@
<?xml version="1.0" encoding="UTF-8"?>
<!-- This cspec is based upon the PowerPC 64-bit ELF ABI specification -->
<!-- Very similar to the PowerPC 64-bit big-endian cspec, but does not reverse justification when
assigning odd datatype sizes -->
<compiler_spec>
<data_organization>
<pointer_size value="8"/>
<machine_alignment value="8" />
<default_alignment value="1" />
<default_pointer_alignment value="8" />
<pointer_size value="8" />
<wchar_size value="4" />
<short_size value="2" />
<integer_size value="4" />
<long_size value="8" />
<long_long_size value="8" />
<float_size value="4" />
<double_size value="8" />
<long_double_size value="16" />
<size_alignment_map>
<entry size="1" alignment="1" />
<entry size="2" alignment="2" />
<entry size="4" alignment="4" />
<entry size="8" alignment="8" />
<entry size="16" alignment="16" />
</size_alignment_map>
</data_organization>
<global>
<range space="ram"/>
@@ -50,33 +70,49 @@
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
<register name="f13"/>
</pentry>
<pentry minsize="1" maxsize="8">
<pentry minsize="1" maxsize="8" extension="inttype">
<register name="r3"/>
</pentry>
<pentry minsize="1" maxsize="8">
<pentry minsize="1" maxsize="8" extension="inttype">
<register name="r4"/>
</pentry>
<pentry minsize="1" maxsize="8">
<pentry minsize="1" maxsize="8" extension="inttype">
<register name="r5"/>
</pentry>
<pentry minsize="1" maxsize="8">
<pentry minsize="1" maxsize="8" extension="inttype">
<register name="r6"/>
</pentry>
<pentry minsize="1" maxsize="8">
<pentry minsize="1" maxsize="8" extension="inttype">
<register name="r7"/>
</pentry>
<pentry minsize="1" maxsize="8">
<pentry minsize="1" maxsize="8" extension="inttype">
<register name="r8"/>
</pentry>
<pentry minsize="1" maxsize="8">
<pentry minsize="1" maxsize="8" extension="inttype">
<register name="r9"/>
</pentry>
<pentry minsize="1" maxsize="8">
<pentry minsize="1" maxsize="8" extension="inttype">
<register name="r10"/>
</pentry>
<pentry minsize="1" maxsize="500" align="8">
<addr offset="112" space="stack"/>
</pentry>
<rule>
<datatype name="homogeneous-float-aggregate" maxprimitives="1"/>
<join storage="float"/>
<extra_stack afterstorage="general" afterbytes="64"/>
<consume_extra storage="general"/>
</rule>
<rule>
<datatype name="float"/>
<join storage="float"/> <!-- The join is NOT aligned -->
<extra_stack afterstorage="general" afterbytes="64"/>
<consume_extra storage="general"/>
</rule>
<rule>
<datatype name="any"/>
<join align="true"/> <!-- The join IS aligned -->
</rule>
</input>
<output>
<pentry minsize="1" maxsize="8" metatype="float" extension="float">
@@ -85,6 +121,14 @@
<pentry minsize="1" maxsize="8" extension="inttype">
<register name="r3"/>
</pentry>
<rule>
<datatype name="struct"/>
<convert_to_ptr/>
</rule>
<rule>
<datatype name="union"/>
<convert_to_ptr/>
</rule>
</output>
<unaffected>
<register name="r14"/>
@@ -109,7 +153,32 @@
<!-- In cases where r2 does change, we assume it will get restored -->
<register name="r2"/>
<register name="r2Save"/>
<register name="f14"/>
<register name="f15"/>
<register name="f16"/>
<register name="f17"/>
<register name="f18"/>
<register name="f19"/>
<register name="f20"/>
<register name="f21"/>
<register name="f22"/>
<register name="f23"/>
<register name="f24"/>
<register name="f25"/>
<register name="f26"/>
<register name="f27"/>
<register name="f28"/>
<register name="f29"/>
<register name="f30"/>
<register name="f31"/>
<register name="cr2"/>
<register name="cr3"/>
<register name="cr4"/>
</unaffected>
<killedbycall>
<register name="r3"/>
<register name="f1"/>
</killedbycall>
<pcode inject="uponreturn">
<body>
# Inject pcode when returning from a function call to place the r2Save