Paramjot (PJ) Oberoi
37870b97b1
SuperH: Fix trapa Regression
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Fix regression in trapa instruction involving PC deref.
2022-07-27 22:37:01 -04:00
VGKintsugi
81ef5ee065
SuperH: Fix trapa to use call instead of goto
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Fix by waterfuell
2021-11-06 23:43:54 -04:00
chenzitai
78adda3598
Fix problem in superh movmu
2021-09-25 17:55:50 +01:00
chenzitai
b05bb76bf9
Fix problem in superh bld
2021-09-25 17:51:37 +01:00
chenzitai
4d2aa982fb
Fix bug in movml.l instruction of superh.sinc
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When rn_imm_08_11 is 15, it should load the value pointed by r15 to pr
instead of read the value in pr to r15 pointer.
2021-08-28 01:29:07 +01:00
VGKintsugi
89f6e9bb7d
SuperH: Additional delay slot bug fixes
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Review of all delay slot instructions.
2021-06-03 11:39:01 -04:00
VGKintsugi
0f50356e73
SuperH: Div1 Code Review Changes
2021-04-17 03:03:36 -04:00
VGKintsugi
27ad2f4b8c
SuperH: simplify div1 logic
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asdf-prime's modifications to div1 instruction. See PR: https://github.com/NationalSecurityAgency/ghidra/pull/2478
2021-03-25 02:38:21 -04:00
VGKintsugi
f1fc3a29ca
SuperH: Delay slot fix for bf/s and and bt/s
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Code now caches the value of the $(T_FLAG) before executing the delay slot. Previously the instruction executed in delay slot could potentially change the value of $(T_FLAG) and thereby resulting in incorrect behavior. Credit to Slinga and Waterfuell from SegaXtreme for reporting the issue.
2021-03-25 02:08:22 -04:00
emteere
a1a49b204c
GP-183_emteere split cspec for SH2A which includes floating point
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registers. Couldn't use superh.cspec. 1/2 don't have these floating
point registers
2020-10-05 17:34:55 -04:00
Alexey Esaulenko
90c14006ca
SH2 float calling conventions
2020-08-21 11:48:44 +03:00
Alexey Esaulenko
a12a0c19de
SH2 float substract fix
2020-08-21 11:20:01 +03:00
Octocontrabass
c9fcb5efe7
SuperH: correct rotr instruction
2020-07-23 16:05:36 -07:00
ghidorahrex
a621f6cefa
GT-3573: Corrected SuperH rte instruction goto pcode
2020-03-02 13:12:49 -05:00
Wesley Ceraso Prudencio
077b5788ab
Fixes the lvalue for movu.b and movu.w
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As with all other mov instructions, the second address is the lvalue, the one to receive the data.
For movu.b and movu.w the first address was receiving its own data.
2019-11-21 08:22:52 -08:00
shrlnm
dd7e0e2097
fix typo in token finstr16
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wrong bit range definition
2019-11-20 09:36:02 +03:00
shrlnm
d69dbe5c97
fix movi20 and movi20s
2019-11-19 11:43:58 +03:00
mumbel
cab68a3ece
SuperH 2A - fix sign in action
2019-10-19 21:13:05 -05:00
mumbel
2ba38a6303
SuperH exts.b and exts.w fix
2019-09-25 16:33:15 -05:00
emteere
18efe0c228
GT-3029 Fixing minor issues for pull acceptance. Unfolded multi-store
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loops
2019-09-09 18:33:33 -04:00
paramjot@gmail.com
276ee657aa
super-h: Corrected bsrf and jsr instructions
2019-08-08 21:59:58 -04:00
paramjot@gmail.com
bab4788add
Added #ifdef around shad/shld so the instructions are SH-2A only.
2019-08-04 23:44:52 -04:00
mumbel
63031e6fdd
Cleanup SHAD and SHLD
2019-08-02 16:05:38 -05:00
paramjot@gmail.com
1601eee21a
split mov.(b,l,w) instructions into two as requested in code review
2019-07-31 00:02:40 -04:00
mumbel
b1833266e0
fixup a refactor bug in shifting
2019-07-30 17:30:32 -05:00
mumbel
e6b6004b79
minor 2a cleanup
2019-07-30 17:25:23 -05:00
mumbel
922fa5c555
constructor for PC based mov
2019-07-30 17:17:18 -05:00
Guy Zana
5974048c99
super-h: fixed code review comments - 2
2019-07-30 08:45:53 +03:00
Guy Zana
63a8d9f216
super-h: fixed code review comments by @mumbel
2019-07-30 08:45:53 +03:00
Guy Zana
11833459e5
super-h: Added SuperH-2A and FPU support
2019-07-30 08:45:53 +03:00
Guy Zana
20edb02cf7
super-h: minor fixes and cleanups
2019-07-30 08:44:38 +03:00
paramjot@gmail.com
0d4d1eb7bd
Removed extra whitespace in mov operand
2019-07-30 00:04:57 -04:00
paramjot@gmail.com
5f1e353e1c
Implemented code review changes
2019-07-29 23:29:38 -04:00
paramjot@gmail.com
8cdf270847
Initial SuperH SH-1/SH-2 Processor Support
2019-06-23 17:58:32 -04:00
