ghidra

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Shawn Hoffman 91c767284d hexagon: swap vmin/vmax/shuffo/vaddw operand display to match LLVM

Same class of bug as the earlier min/minu fix: the displayed source
operand order contradicts the instruction syntax recorded in each
constructor's own doc comment (and LLVM/the PRM).

  vminb/vminh/vminub/vminuh/vminuw/vminw, vmaxb/vmaxh/vmaxub/vmaxuh/
  vmaxuw/vmaxw and shuffob/shuffoh are documented as "f ( Rtt32 , Rss32 )"
  but displayed Rss before Rtt.
  vaddw and vaddw:sat are documented as "vaddw ( Rss32 , Rtt32 )" but
  displayed Rtt before Rss.

Includes the V62 "Rdd32,Pe4 = vminub ( Rtt32 , Rss32 )" form.

The pcodeop / inline arguments are swapped to match, so the emitted call
argument order still follows the displayed operand order. For the min,
max and add forms this is semantically neutral (all commutative); it
matters for vminubPred, whose result is defined relative to the first
operand, and for the opaque shuffob/shuffoh, whose operand roles are
positional.

Verified: SleighCompile clean, all 60 Hexagon unit tests pass. No test
expectations change (the one test pinning vminub uses R1R0 for both
sources).

2026-09-10 16:54:28 -04:00