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configs/aspeed_ast2600evb: set BR2_ARM_FPU_VFPV4D16

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The features of the Cortex A7 CPU on the Aspeed AST2600 A3 SoC are :

  half thumb fastmult vfp edsp vfpv3 vfpv3d16 tls vfpv4 idiva idivt lpae evtstrm

the vfpv3d16 feature bit is common to both vfpv3 and vfpv4.

Drop BR2_ARM_FPU_VFPV4 which activates the use of vpfd32 (and breaks
user space). Set BR2_ARM_FPU_VFPV4D16 instead.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
(cherry picked from commit 7ccb318d80)
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
This commit is contained in:
Cédric Le Goater
2022-09-25 15:22:18 +02:00
committed by Peter Korsgaard
parent e665d20f7a
commit 23fbc41429
1 changed files with 1 additions and 1 deletions
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configs/aspeed_ast2600evb_defconfig
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@@ -1,7 +1,7 @@
# Architecture
BR2_arm=y
BR2_cortex_a7=y
BR2_ARM_FPU_VFPV4=y
BR2_ARM_FPU_VFPV4D16=y
# System
BR2_TARGET_GENERIC_HOSTNAME="aspeed-evb"