package/zynq-boot-bin: drop legacy package

Since commit 6dd5a33c48 (zynq_zed: bump U-Boot to xilinx-v2016.2), we
have no in-tree users of zynq-boot-bin.py, as U-Boot has since v2016.01
been able to natively generate Xilinx images.

zynq-boot-bin.py is python2-only and there is zero chance that upstream
will move it to python3. We could carry a python3-compatible copy, but
that tool is now virtually unused.

6 years have passed now; let it rest in peace at last.

Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
Cc: James Hilliard <james.hilliard1@gmail.com>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
This commit is contained in:
Yann E. MORIN
2022-01-11 22:17:08 +01:00
committed by Arnout Vandecappelle (Essensium/Mind)
parent 18a19c985f
commit f22bff4a79
5 changed files with 13 additions and 47 deletions

View File

@@ -455,18 +455,6 @@ config BR2_TARGET_UBOOT_SPL_NAME
and TPL name is tpl/u-boot-tpl.bin but not always. SPL name is
MLO on OMAP and SPL on i.MX6 for example.
config BR2_TARGET_UBOOT_ZYNQ_IMAGE
bool "Generate image for Xilinx Zynq"
depends on BR2_arm
depends on BR2_TARGET_UBOOT_SPL
depends on BR2_TARGET_UBOOT_FORMAT_DTB_IMG
help
Generate the BOOT.BIN file from U-Boot's SPL. The image
boots the Xilinx Zynq chip without any FPGA bitstream.
A bitstream can be loaded by the U-Boot. The SPL searchs
for u-boot-dtb.img file so this U-Boot format is required
to be set.
config BR2_TARGET_UBOOT_ZYNQMP
bool "Boot on the Xilinx ZynqMP SoCs"
depends on BR2_aarch64

View File

@@ -432,17 +432,6 @@ UBOOT_POST_BUILD_HOOKS += UBOOT_BUILD_OMAP_IFT
UBOOT_POST_INSTALL_IMAGES_HOOKS += UBOOT_INSTALL_OMAP_IFT_IMAGE
endif
ifeq ($(BR2_TARGET_UBOOT_ZYNQ_IMAGE),y)
define UBOOT_GENERATE_ZYNQ_IMAGE
$(HOST_DIR)/bin/python2 \
$(HOST_DIR)/bin/zynq-boot-bin.py \
-u $(@D)/$(firstword $(call qstrip,$(BR2_TARGET_UBOOT_SPL_NAME))) \
-o $(BINARIES_DIR)/BOOT.BIN
endef
UBOOT_DEPENDENCIES += host-zynq-boot-bin
UBOOT_POST_INSTALL_IMAGES_HOOKS += UBOOT_GENERATE_ZYNQ_IMAGE
endif
ifeq ($(BR2_TARGET_UBOOT_ALTERA_SOCFPGA_IMAGE_CRC),y)
ifeq ($(BR2_TARGET_UBOOT_SPL),y)
UBOOT_CRC_ALTERA_SOCFPGA_INPUT_IMAGES = $(call qstrip,$(BR2_TARGET_UBOOT_SPL_NAME))