Fix to ARM switch function fixups

This commit is contained in:
caheckman
2020-11-13 17:15:11 -05:00
parent 7bd149cb84
commit 1f443a15b4
2 changed files with 8 additions and 16 deletions

View File

@@ -158,8 +158,7 @@
tmpptr = lr & 0xfffffffe;
offset = *:1 (tmpptr + r0);
offset = offset * 2;
lr = lr + zext(offset);
lr = lr + 2 * zext(offset);
ISAModeSwitch = (lr & 1) != 0;
TB = ISAModeSwitch;
@@ -177,8 +176,7 @@
tmpptr = lr & 0xfffffffe;
offset = *:1 (tmpptr + r0);
offset = offset * 2;
lr = lr + sext(offset);
lr = lr + 2 * sext(offset);
ISAModeSwitch = (lr & 1) != 0;
TB = ISAModeSwitch;
@@ -197,8 +195,7 @@
index = r0 * 2;
offset = *:2 (tmpptr + index);
offset = offset * 2;
lr = lr + sext(offset);
lr = lr + 2 * sext(offset);
ISAModeSwitch = (lr & 1) != 0;
TB = ISAModeSwitch;
@@ -217,8 +214,7 @@
index = r0 * 2;
offset = *:2 (tmpptr + index);
offset = offset * 2;
lr = lr + zext(offset);
lr = lr + 2 * zext(offset);
ISAModeSwitch = (lr & 1) != 0;
TB = ISAModeSwitch;

View File

@@ -117,8 +117,7 @@
tmpptr = lr & 0xfffffffe;
offset = *:1 (tmpptr + r0);
offset = offset * 2;
lr = lr + zext(offset);
lr = lr + 2 * zext(offset);
ISAModeSwitch = (lr & 1) != 0;
TB = ISAModeSwitch;
@@ -136,8 +135,7 @@
tmpptr = lr & 0xfffffffe;
offset = *:1 (tmpptr + r0);
offset = offset * 2;
lr = lr + sext(offset);
lr = lr + 2 * sext(offset);
ISAModeSwitch = (lr & 1) != 0;
TB = ISAModeSwitch;
@@ -156,8 +154,7 @@
index = r0 * 2;
offset = *:2 (tmpptr + index);
offset = offset * 2;
lr = lr + sext(offset);
lr = lr + 2 * sext(offset);
ISAModeSwitch = (lr & 1) != 0;
TB = ISAModeSwitch;
@@ -176,8 +173,7 @@
index = r0 * 2;
offset = *:2 (tmpptr + index);
offset = offset * 2;
lr = lr + zext(offset);
lr = lr + 2 * zext(offset);
ISAModeSwitch = (lr & 1) != 0;
TB = ISAModeSwitch;