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GP-3078: Corrected x86-64 mov offset instruction variant

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ghidorahrex
2023-02-06 16:57:54 +00:00
parent 65f20da73c
commit 9be2a25cdb
1 changed files with 2 additions and 0 deletions
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Ghidra/Processors/x86/data/languages/ia.sinc
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@@ -936,6 +936,8 @@ moffs32: segWide^[imm64] is addrsize=2 & highseg=1 & segWide & imm64 { tmp:8
@ifdef IA64
moffs64: segWide^[imm64] is addrsize=2 & segWide & imm64 { export *:8 imm64; }
moffs64: segWide^[imm64] is addrsize=2 & highseg=1 & segWide & imm64 { tmp:8 = segWide + imm64; export *:8 tmp; }
moffs64: segWide^[imm32] is addrsize=1 & segWide & imm32 { export *:8 imm32; }
moffs64: segWide^[imm32] is addrsize=1 & highseg=1 & segWide & imm32 { tmp:8 = segWide + imm32; export *:8 tmp; }
@endif
# TODO: segment register offset in 64bit might not be right