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'origin/GP-2536_ghidorahrex_ARM_addrmode3_fix' into Ghidra_10.2 (Closes
#4582)
This commit is contained in:
ghidra1
2022-10-27 16:51:20 -04:00
parent e1eb6dc7df 9f999c2ffc
commit fa932fee76
2 changed files with 16 additions and 16 deletions
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4
Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc
View File

@@ -2276,14 +2276,14 @@ define pcodeop ExclusiveAccess;
Rt1215 = zext(val);
}
:ldrsb^ItCond".w" Rt1215,RnIndirect12 is TMode=1 & ItCond & (op4=0xf99; Rt1215) & RnIndirect12
:ldrsb^ItCond^".w" Rt1215,RnIndirect12 is TMode=1 & ItCond & (op4=0xf99; Rt1215) & RnIndirect12
{
build ItCond;
tmp:1 = *RnIndirect12;
Rt1215 = sext(tmp);
}
:ldrsb^ItCond".w" Rt1215,RnIndirectPUW is TMode=1 & ItCond & (op4=0xf91; Rt1215 & thc1111=1) & $(RN_INDIRECT_PUW)
:ldrsb^ItCond^".w" Rt1215,RnIndirectPUW is TMode=1 & ItCond & (op4=0xf91; Rt1215 & thc1111=1) & $(RN_INDIRECT_PUW)
{
build ItCond;
build RnIndirectPUW;

28
Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc
View File

@@ -987,80 +987,80 @@ addrmode2: [rn],-addr2shift is I25=1 & P24=0 & U23=0 & W21=1 & rn & addr2shift {
# it returns a varnode containing the address
###########################
addrmode3: [reloff] is P24=1 & U23=1 & c2122=2 & c1619=15 & immedH & c0707=1 & c0404=1 & immedL
addrmode3: [reloff] is P24=1 & U23=1 & c2122=2 & c1619=15 & immedH & immedL
[ reloff=inst_start+8+((immedH<<4) | immedL);]
{
export *:4 reloff;
}
addrmode3: [reloff] is P24=1 & U23=0 & c2122=2 & c1619=15 & immedH & c0707=1 & c0404=1 & immedL
addrmode3: [reloff] is P24=1 & U23=0 & c2122=2 & c1619=15 & immedH & immedL
[ reloff=inst_start+8-((immedH<<4) | immedL);]
{
export *:4 reloff;
}
addrmode3: [rn,"#"^off8] is P24=1 & U23=1 & c2122=2 & rn & immedH & c0707=1 & c0404=1 & immedL
addrmode3: [rn,"#"^off8] is P24=1 & U23=1 & c2122=2 & rn & immedH & immedL
[ off8=(immedH<<4)|immedL;]
{
local tmp = rn + off8; export tmp;
}
addrmode3: [rn,"#"^noff8] is P24=1 & U23=0 & c2122=2 & rn & immedH & c0707=1 & c0404=1 & immedL
addrmode3: [rn,"#"^noff8] is P24=1 & U23=0 & c2122=2 & rn & immedH & immedL
[ noff8=-((immedH<<4)|immedL);]
{
local tmp = rn + noff8; export tmp;
}
addrmode3: [rn,rm] is P24=1 & U23=1 & c2122=0 & rn & c0811=0 & c0707=1 & c0404=1 & rm
addrmode3: [rn,rm] is P24=1 & U23=1 & c2122=0 & rn & c0811=0 & rm
{
local tmp = rn + rm; export tmp;
}
addrmode3: [rn,-rm] is P24=1 & U23=0 & c2122=0 & rn & c0811=0 & c0707=1 & c0404=1 & rm
addrmode3: [rn,-rm] is P24=1 & U23=0 & c2122=0 & rn & c0811=0 & rm
{
local tmp = rn - rm; export tmp;
}
addrmode3: [rn,"#"^off8]! is P24=1 & U23=1 & c2122=3 & rn & immedH & c0707=1 & c0404=1 & immedL
addrmode3: [rn,"#"^off8]! is P24=1 & U23=1 & c2122=3 & rn & immedH & immedL
[ off8=(immedH<<4)|immedL;]
{
rn=rn + off8; export rn;
}
addrmode3: [rn,"#"^noff8]! is P24=1 & U23=0 & c2122=3 & rn & immedH & c0707=1 & c0404=1 & immedL
addrmode3: [rn,"#"^noff8]! is P24=1 & U23=0 & c2122=3 & rn & immedH & immedL
[ noff8=-((immedH<<4)|immedL);]
{
rn=rn + noff8; export rn;
}
addrmode3: [rn,rm]! is P24=1 & U23=1 & c2122=1 & rn & c0811=0 & c0707=1 & c0404=1 & rm
addrmode3: [rn,rm]! is P24=1 & U23=1 & c2122=1 & rn & c0811=0 & rm
{
rn = rn+rm; export rn;
}
addrmode3: [rn,-rm]! is P24=1 & U23=0 & c2122=1 & rn & c0811=0 & c0707=1 & c0404=1 & rm
addrmode3: [rn,-rm]! is P24=1 & U23=0 & c2122=1 & rn & c0811=0 & rm
{
rn = rn - rm; export rn;
}
addrmode3: [rn],"#"^off8 is P24=0 & U23=1 & c2122=2 & rn & immedH & c0707=1 & c0404=1 & immedL
addrmode3: [rn],"#"^off8 is P24=0 & U23=1 & c2222=1 & rn & immedH & immedL
[ off8=(immedH<<4)|immedL;]
{
local tmp=rn; rn=rn + off8; export tmp;
}
addrmode3: [rn],"#"^noff8 is P24=0 & U23=0 & c2122=2 & rn & immedH & c0707=1 & c0404=1 & immedL
addrmode3: [rn],"#"^noff8 is P24=0 & U23=0 & c2222=1 & rn & immedH & immedL
[ noff8=-((immedH<<4)|immedL);]
{
local tmp=rn; rn=rn + noff8; export tmp;
}
addrmode3: [rn],rm is P24=0 & U23=1 & c2122=0 & rn & c0811=0 & c0707=1 & c0404=1 & rm
addrmode3: [rn],rm is P24=0 & U23=1 & c2222=0 & rn & c0811=0 & rm
{
local tmp=rn; rn=rn+rm; export tmp;
}
addrmode3: [rn],-rm is P24=0 & U23=0 & c2122=0 & rn & c0811=0 & c0707=1 & c0404=1 & rm
addrmode3: [rn],-rm is P24=0 & U23=0 & c2222=0 & rn & c0811=0 & rm
{
local tmp=rn; rn=rn-rm; export tmp;
}